J. Lienig, Layoutsynthese elektronischer Schaltungen — Grundlegende Algorithmen für die Entwurfsautomatisierung  (Translation: Physical Design of Electronic Circuits — Basic Algorithms) [more]. Springer-Verlag, Berlin, Heidelberg, New York, ISBN: 3-540-29627-1, 2006.

J. Lienig, Anwendung evolutionärer Algorithmen für den rechnergestützten Entwurf des Schaltungslayouts (Translation: Evolutionary Algorithms Applied to VLSI Physical Design.) Fortschrittberichte VDI, Reihe 20, Nummer 228. VDI-Verlag, Düsseldorf, 1996.

J. Lienig, Ein Verdrahtungssystem für den rechnergestützten Layoutentwurf von Multichipträgern (Translation: Routing Strategies for the Computer-Aided Design of Multi-Chip Modules.) Fortschrittberichte VDI, Reihe 9, Nummer 119. VDI-Verlag, Düsseldorf, 1991.

G. Jerke, J. Lienig, J. B. Freuer "Constraint-Driven Design Methodology – A Path to Analog Design Automation," Analog Layout Synthesis — A Survey of Topological Approaches, H. Graeb (ed.) Springer Verlag, Berlin, pp. 271-299, to be published 2010.

T. Meister, J. Lienig, G. Thomke "Universal Methodology to Handle Differential Pairs during Pin Assignment," [more] VLSI-SoC: Design Methodologies for SoC and SiP, Ch. Piguet, R. Reis , D. Soudris (eds.) Springer Verlag, Boston, ISBN 978-3-642-12266-8, pp. 22-42, 2010.

J. P. Cohoon, J. Karro, J. Lienig "Evolutionary Algorithms for the Physical Design of VLSI Circuits," [pdf, ps] Advances in Evolutionary Computing: Theory and Applications, Ghosh, A., Tsutsui, S. (eds.) Springer Verlag, London, ISBN 3-540-43330-9, pp. 683-712, 2003.

W. N. Martin, J. Lienig, J. P. Cohoon, "Island (Migration) Models: Evolutionary Algorithms Based on Punctuated Equilibria," [pdf, ps] Handbook of Evolutionary Computation, Oxford University Press, New York, NY, pp. C6.3:1-C6.3:16, 1997.

J. Lienig, "Physical Design of VLSI Circuits and the Application of Genetic Algorithms," [pdf, ps] Evolutionary Algorithms in Engineering Applications, Springer Verlag, Berlin, pp. 277-292, 1997.

F. Reifegerste, J. Lienig "Modelling of the Temperature and Current Dependence of LED Spectra," [pdf]  Journal of Light & Visual Environment, vol. 32, no. 3  pp. 288-294, Aug.  2008.

A. Richter, G. Paschew, S. Klatt, J. Lienig, K.-F. Arndt, H.-J. P. Adler "Review on Hydrogel-based pH Sensors and Microsensors," [pdf]  Sensors, vol. 8,  pp. 561-581, Jan.  2008.

A. Richter, W. Krause, J. Lienig, K.-F. Arndt "Polymernetzwerke als Aktor-Sensor-Systeme für die Automatisierung biomedizinischer Geräte (Translation: Polymer Networks as Actor and Sensor Systems to be Used for Automation of Biomedical Devices)," [pdf] Biomedizinische Technik, vol. 50, no. 3, pp. 66-68, March 2005.

G. Jerke,  J. Lienig "Hierarchical Current Density Verification in Arbitrarily Shaped Metallization Patterns of Analog Circuits," [pdf, ps] IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 23, no. 1, pp. 80-90, Jan. 2004.

J. Lienig, G. Jerke "Elektromigration — eine neue Herausforderung beim Entwurf elektronischer Baugruppen (Translation: Electromigration — A New Challenge in Electronic Design)," F&M Feinwerktechnik, Mikrotechnik, Mikroelektronik, Part I/Teil I: Ursachen und Beeinflussungsmöglichkeiten [pdf]: pp. 36-39, Oct. 2002, Part II/Teil II: Stromabhängige Verdrahtung von Leiterbahnen [pdf]: pp. 26-28, Jan./Feb. 2003, Part III/Teil III: Berechnung von Stromdichten [pdf]: pp. 12-15, March 2003.

J. Lienig, "IC-Layoutentwurf vor neuen Herausforderungen (Translation: IC-Placement and Routing Face New Challenges)," [pdf] F&M Feinwerktechnik, Mikrotechnik, Mikroelektronik, pp. 76-78, Dec. 1999.

J. Lienig, "A Parallel Genetic Algorithm for Performance-Driven VLSI Routing," [pdf, ps] IEEE Transactions on Evolutionary Computation, vol. 1, no. 1, pp. 29-39, 1997.

J. Lienig, "Evolutionäre Algorithmen für den Layoutentwurf (Translation: Evolutionary Algorithms for Physical Design Automation)," F&M Feinwerktechnik, Mikrotechnik, Mikroelektronik, pp. 406-410, June 1997.

Lienig, J.: „Anwendung evolutionärer Algorithmen für den rechnergestützten Entwurf des Schaltungslayouts (Translation: Evolutionary Algorithms Applied to Circuit Design)”, Verbindungstechnik in der Elektronik und Feinwerktechnik, Heft 2 (1997),  pp. 96-97, April 1997.

J. Lienig and K. Thulasiraman, "GASBOR: A Genetic Algorithm Approach for Solving the Switchbox Routing Problem," [pdf, ps] Journal of Circuits, Systems, and Computers, World Scientific Publishing Co., Vol. 6, No. 4, pp. 359-373, 1996.

J. Lienig and K. Thulasiraman, "A Genetic Algorithm for Channel Routing in VLSI Circuits," [pdf, ps] Evolutionary Computation, MIT Press, Vol. 1, No. 4, pp. 293-311, 1994.

H. Brandt, J. Lienig and G. Röhrs, "Ein genetischer Algorithmus zur Optimierung von Verdrahtungsstrukturen (Translation: A Genetic Algorithm to Optimize Routing Structures)," Wissenschaftliche Zeitschrift der TU Dresden, Heft 2, pp. 93-97, 1992.

J. Lienig, Ein Verdrahtungssystem zum rechnergestützten Layoutentwurf von Multichipträgern  (Translation: A Routing System for the Computer-Aided Design of Special Multi-Chip Modules)," Wissenschaftliche Zeitschrift der TU Dresden, Heft 5/6, pp. 157-161, 1991.

J. Lienig and D. A. Mlynski, "Mehrlagenkanalverdrahtung unter Einbeziehung technologischer Randbedingungen (Translation: Technology-Oriented Multilayer Channel Routing)," Wissenschaftliche Zeitschrift der TU Dresden, Heft 5/6, pp. 163-167, 1991.

G. Jerke, J. Lienig "Early-Stage Determination of Current-Density Criticality in Interconnects," [pdf] Proc. of the 11th IEEE Int. International Symposium on Quality Electronic Design (ISQED 2010), San Jose, CA, pp. 667-774, March 2010.

A. Nassaj, J. Lienig, G. Jerke "A New Methodology for Constraint-Driven Layout Design of Analog Circuits," [pdf] Proc. of the 16th IEEE Int. Conference on Electronics, Circuits and Systems (ICECS 2009), Hammamet, Tunisia, pp. 996-999, Dec. 2009.

R. Fischbach, J. Lienig, T. Meister "From 3D Circuit Technologies and Data Structures to Interconnect Prediction," Invited Talk, [pdf] Proc. of 2009 Int. Workshop on System Level Interconnect Prediction (SLIP), San Francisco, CA, pp. 77-84, July 2009.

F. Krämer, S. Rzepka, J. Lienig "Lifetime Modeling for JEDEC Drop Tests," [pdf] Proc. 10th Int. Conf. on Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, EuroSimE, pp. 309-317, April 2009.

G. Jerke, J. Lienig, "Constraint-driven Design — The Next Step Towards Analog Design Automation," Invited Talk, [pdf, slides] Proc. of the Int. Symposium on Physical Design (ISPD'09), San Diego, CA, pp. 75-82, March 2009.

T. Meister, J. Lienig, G. Thomke "Universal Methodology to Handle Differential Pairs During Pin Assignment," [pdf] Proc. of the 16th IFIP/IEEE Int. Conf. on Very Large Scale Integration (VLSI-SoC 2008), Rhodes Island, Greece, pp. 347-352, Oct. 2008.

A. Nassaj, J. Lienig, G. Jerke "A Constraint-driven Methodology for Placement of Analog and Mixed-signal Integrated Circuits," [pdf] Proc. of the 14th IEEE Int. Conf. on Electronics, Circuits and Systems (ICECS), Malta, pp. 770-773, Aug. 2008.

S. Rzepka, F. Krämer, O. Grassmé, J. Lienig "A Multilayer PCB Material Modeling Approach Based on Laminate Theory," [pdf] Proc. 9th Int. Conf. on Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, EuroSimE, Freiburg, pp. 234-243, April 2008.

T. Meister, J. Lienig, G. Thomke "Novel Pin Assignment Algorithms for Components with Very High Pin Counts," [pdf] Proc. Design, Automation and Test in Europe (DATE), Munich, pp. 837-842, March 2008.

J. Lienig, "Introduction to Electromigration-Aware Physical Design," Invited Talk, [pdf] Proc. of the Int. Symposium on Physical Design (ISPD'06), San Jose, CA, pp. 39-46, April 2006.

J. Lienig, "Interconnect and Current Density Stress — An Introduction to Electromigration-Aware Design," Invited Talk, [pdf] Proc. of 2005 Int. Workshop on System Level Interconnect Prediction (SLIP), San Francisco, CA, pp. 81-88, April 2005.

J. Lienig, G. Jerke "Electromigration-Aware Physical Design of Integrated Circuits," Invited Tutorial, [pdf] Proc. of the 18th Int. Conference on VLSI Design, Kolkata, India, pp. 77-82, January 2005.

G. Jerke, J. Lienig, J. Scheible "Reliability-Driven Layout Decompaction for Electromigration Failure Avoidance in Complex Mixed-Signal IC Designs," [pdf, slides] Proc. of the Design Automation Conference (DAC'04), San Diego, CA, pp. 181-184, June 2004.

J. Lienig, G. Jerke "Current-Driven Wire Planning for Electromigration Avoidance in Analog Circuits," [pdf, ps, slides] Proc. of the 8th Asia and South Pacific Design Automation Conference (ASP-DAC), Kitakyusyu, Japan, pp. 783-788, 2003.

G. Jerke, J. Lienig "Hierarchical Current Density Verification for Electromigration Analysis in Arbitrarily Shaped Metallization Patterns of Analog Circuits," [pdf, ps, slides] Proc. Design, Automation and Test in Europe (DATE), Paris, pp. 464-469, 2002.

J. Lienig, G. Jerke, T. Adler "Electromigration Avoidance in Analog Circuits: Two Methodologies for Current Driven Routing," [pdf, ps, slides] Proc. of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC) and 15th International Conference on VLSI Design, Bangalore, India, pp. 372-378, 2002.

J. Lienig, G. Jerke, T. Adler "AnalogRouter: A New Approach of Current-Driven Routing for Analog Circuits," [pdf, ps] Proc. Design, Automation and Test in Europe (DATE), Munich, p. 819, 2001.

J. Lienig, "Channel and Switchbox Routing with Minimized Crosstalk — A Parallel Genetic Algorithm Approach," [pdf, ps] Proc. of the 10th International Conference on VLSI Design, Hyderabad, India, pp. 27-31, 1997.

J. Lienig, J. P. Cohoon, "Genetic Algorithms Applied to the Physical Design of VLSI Circuits: A Survey," Parallel Problem Solving from Nature, Voigt, H.-M, Ebeling, W., Rechenberg, I., Schwefel, H.-P., eds., Lecture Notes in Computer Science, Vol. 1141, Berlin: Springer Verlag, pp. 839-848, 1996.

J. Lienig, "A Parallel Genetic Algorithm for Two Detailed Routing Problems," Proc. of the Int. Symposium on Circuits and Systems, ISCAS-96, Atlanta, Georgia, pp. 508-511, 1996.

J. Lienig and K. Thulasiraman, "GASBOR: A Genetic Algorithm for Switchbox Routing in Integrated Circuits," Proc. of the AI'94 Workshop on Evolutionary Computation, Armidale, pp. 199-212, 1994. Also in: Lecture Notes in Artificial Intelligence, Vol. 956, pp. 187-200, 1995.

J. Lienig and H. Brandt, "An Evolutionary Algorithm for the Routing of Multi-Chip Modules," Parallel Problem Solving from Nature, Davidor, Y., Schwefel, H.-P., Männer, R., eds., Lecture Notes in Computer Science, Vol. 866, pp. 588-597, 1994.

J. Lienig and K. Thulasiraman, "A New Genetic Algorithm for the Channel Routing Problem," Proc. of the 7th Int. Conference on VLSI Design, Calcutta, India, pp. 133-136, 1994.

J. Lienig, K. Thulasiraman and M. N. S. Swamy, "Routing Algorithms for Multi-Chip Modules," [pdf] Proc. of the IEEE European Design Automation Conference (EDAC) , Hamburg, pp. 286-291, 1992.

R. Fischbach, J. Lienig, T. Meister "Herausforderungen bei der Automatisierung des Layoutentwurfs bei dreidimensionalen heterogenen Systemen," Tagungsband Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2010), Fraunhofer Verlag, ISBN 978-3-8396-0126-6, pp. 37-42, May 2010.

J. Hertwig, H. Neubert, J. Lienig "Ein Ansatz zur Modellierung CNT-basierter thermischer Vias für den effektiven Wärmetransport in elektronischen Schaltkreisen," Tagungsband Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2010), Fraunhofer Verlag, ISBN 978-3-8396-0126-6, pp. 43-48, May 2010.

R. Fischbach, J. Lienig, J. Hertwig "Modern 3D Data Structures: Classification, Comparison and Solution Space Investigation," Tagungsband edaWorkshop 10, VDE Verlag, ISBN 978-3-8007-3252-4, pp. 41-46, May 2010.

T. Meister, J. Lienig, "Routability Prediction for Three-Dimensional Circuits," Tagungsband edaWorkshop 10, VDE Verlag, ISBN 978-3-8007-3252-4, pp. 29-34, May 2010.

T. Meister, J. Lienig, "Neue Herausforderungen an die Verdrahtungsvorhersage beim 3D-Layoutentwurf," [pdf] GMM-Fachbericht 61, Zuverlässigkeit und Entwurf, VDE Verlag, pp. 99-106, Sept. 2009.

R. Fischbach, J. Lienig, "3D-Integration und 3D-Datenstrukturen — Eine Übersicht," [pdf] Tagungsband edaWorkshop 09, VDE Verlag, pp. 7-12, May 2009.

J. Lienig, "Elektromigration und deren Berücksichtigung beim Layoutentwurf," [pdf] Tagungsband Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2008), ISBN 3-9810287-2-4, pp. 13-14, May 2008.

A. Nassaj, J. Lienig, G. Jerke, J. Freuer "Constraint-geführte Floorplan-Generierung von integrierten Analog- und Mixed-Signal-Schaltungen," [pdf] GMM-Fachbericht ANALOG '08, Siegen, pp. 159-164, April 2008.

T. Meister, J. Lienig, G. Thomke "Pinzuordnungs-Algorithmen für hochkomplexe Area-Array-Komponenten," [pdf] GMM-Fachbericht ANALOG '08, Siegen, pp. 177-182, April 2008.